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Godson1
- 龙芯一号的数据手册！ 通用32 位微处理器，支持MIPS-III 指令 主频为200~266MHZ 基于操作队列复用的高效7 级标量流水线 高效的64 位浮点流水单元 浮点性能220 MFLOP @250MHz 内置MMU、TLB 实现从程序虚拟地址到CPU物理地址的转换-Godson manual data on the 1st! Definitive 32 microprocessor, support MIPS-III Directive megabyte of 2
AccelDSP
- AccelDSP Synthesis Tool Floating-Point to Fixed-Point Conversion of MATLAB Algorithms Targeting FPGAs
FLoat_GA.rar
- 基于改进的遗传算法，使用浮点编码，使用变量的真值，使其物理意义明确，加速了收敛,Improved genetic algorithm based on the use of floating-point encoding, the true value of the use of variables to make it clear physical meaning to speed up the convergence
Hi-tech_PICC9.50.rar
- 软件简介：HI-TECH PICC 是一款高效的C编译器，支持Microchip PICmicro 10/12/14/16/17系列控制器。是一款强劲的标准C编译器，完全遵守ISO/ANSI C，支持所有的数据类型包括24 and 32 bit IEEE 标准浮点类型。智能优化产生高质量的代码。属于第三方开发工具。能和MPLAB整合，内嵌开发环境（HI－TIDE）。 Hi-tech PICC Compiler v8.注册码 Serial: HCPIC-88888 First Na
DSP
- 本书编制的实验项目包括“CCS基本操作”、“基本算术运算”、“定点DSP的小数运算和浮点运算”、“DSP混合编程及CCS进阶”四个验证性实验和“数字正弦振荡器的DSP实现”、“FIR数字滤波器的DSP实现”两个综合性实验，并在综合性实验中配备了相关的设计性思考题供学有余力者进行全开放式实验。-Experimental projects include the preparation of the book " CCS basic operation" , " basic
2
- DSP Architecture with Jumping-Floating-Point Number System
FLOAT
- 介绍关于FPGA的浮点加法器运算单元设计-Information on floating-point FPGA-adder cell design computing
float
- 由于浮点数在单片机上面占用很大的空间 本程序就是为了简化程序,希望对大家有用-Single-chip floating-point numbers in the above as a result of a lot of space occupied by this procedure is to streamline the process and hope for all of us useful
fpadd
- It is the floating point data type adder!
sfacIntr
- 定点数只能表示一定范围内的数（整数或小数，有符号或者无符号），浮点数虽将表示数的范围给予了较充分的扩宽，但仍只能表示（理论上）无限精度的数；本导论将引入一种新类型的数——效数，来完美地表示数的范围和精度两个方面，并简要介绍（演示）效数的四则运算。-Fixed-point can only say that within a certain range of numbers (integer or decimal, signed or unsigned), floating point, said
float
- 浮点数-浮点数按实际位数格式化显示的思路-Float- floating-point format according to the actual digit display ideas
doublemult
- 设计了一个双精度浮点乘法器。该器件采用改进的BOO TH 算法产生部分积, 用阵列和 树的混合结构实现对部分积的相加, 同时, 还采用了快速的四舍五入算法, 以提高乘法器的性能。把 设计的乘法器分为4 级流水线, 用FPGA 进行了仿真验证, 结果正确 并对FPGA 实现的时序结果 进行了分析。-Designed a double-precision floating-point multiplier. The device uses an improved algorithm fo
DesignofFloatingPointCalculatorBasedonFPGA
- 给出系统的整体框架设计和各模块的实现，包括芯片的选择、各模块之间的时序以及控制、每个运算模块详细的工作原理和算法设计流程；通过VHDL语言编程来实现浮点数的加减、乘除和开方等基本运算功能；在Xilinx ISE环境下，对系统的主要模块进行开发设计及功能仿真，验证 了基于FPGA的浮点运算。 -The overall framework of system design and realization of each module which contain selection of ch
stream90
- This program measures memory transfer rates in MB/s for simple computational kernels coded in Fortran. These numbers reveal the quality of code generation for simple uncacheable kernels as well as showing the cost of floating-point operations relativ
DIR39
- TI最新单片高性能DSP内核，内核以高性能TIC64X+体系架构为主体，结合浮点运算指令，频率达到1GHZ，同时支持定点和浮点运算-TI latest single high-performance DSP cores, high-performance TIC64X+ core architecture as the main body, combined floating-point instructions, frequency reached 1GHZ, supports fixed p
float
- 搜集的关于[C51源码]浮点数显示并提供了浮点数显示格式的说明，对c51更深入学习有所帮助。-Collected on the [C51 source] float displays, and provides a descr iption of floating-point display format, more in-depth study on the c51 help.
wp-01166-bdti-altera-floating-point-dsp.pdf
- Altera float point design flow
Converting-floating-point-to-32-bit-fixed-point-i
- A simple guide to Converting floating point to 32-bit fixed point in Java
FPGA-floating-Point-IP-cores
- Taking Advantage of Advances in FPGA floating-Point IP cores -Taking Advantage of Advances in FPGA floating-Point IP cores
Fixed-point-and-floating-point
- 主要是DSP嵌入式开发的基础定点运算和浮点运算的讲解。-DSP embedded development mainly to explain the basis of fixed-point and floating-point arithmetic operations.