fpga综合是一件极其耗费时间的工作，很多设计经常要花费几个小时才能完成synthesise，这个教程则从基本设计上讲解一些缩减综合时间的方法论-fpga synthesis is an extremely time-consuming work, a lot of design often take several hours to complete synthesise, this tutorial explain some reduction　the integration time on the basic design methodology