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BoothMultiplier
- -- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthe
RS485EN
- RS485的双向通信处，正在为此头疼的同学们可要注意了，这个可以解决你们双向通信过程中的很多问题哦-Two-way RS485 communications, the headache is to this end they' ll pay attention to the students, this two-way communication you can solve many problems in the course of oh
vmachine
- Verilog code for vending machine.. Descr iption: Vending machine ll take two quarters and distribute one of the two flavors of juice(apple or orange). Inputs: • Q : A quarter has been inserted. • O : orange juice button is press
ll
- 实现交通灯功能，通过按键，可以控制红绿灯的时间-To achieve traffic light function, through the button, can control the traffic lights of the time
keyscan3
- 键盘扫描 以及输入后在LED 上的显示数字是无人分配【是大牌fks东平干净哦耍大牌企鹅王如图七二五体弱配挖潜普通孤儿我陪你 -After scanning the keyboard and input on the LED display digital distribution is no big fks Dongping 【is clean and the king penguins Oh diva seven hundred twenty-five frail figure with
P
- 介绍VHDL的，很不错，可以作为参考。希望能对大家有帮助-VHDL descr iption, very good, can be used as reference. Hope it' ll help
A-Simplified-VHDL-UART
- In embedded systems, the processor that we choose for our design may not come with built-in peripherals. Therefore, designers will have to implement these devices in hardware keeping in mind that they will need to interface to the processor. In this
ll
- 电子计数器测频有两种方式：一是直接测频法，即在一定闸门时间内测量被测信号的脉冲个数；二是间接测频法，如周期测频法。直接测频法适用于高频信号的频率测量，间接测频法适用于低频信号的频率测量。本文阐述了用数字电路设计了一个简单的数字频率计的过程。-Electronic counter measuring frequency in two ways: one is the direct frequency measurement method, that is, in a certain gate ti
LL
- verilog语言描述的SDRAM程序代码。-verilog language to describe the the SDRAM procedure code.
LL
- verilog语言的异步接口转换设计程序代码.-verilog language the asynchronous interface converter design code.
LL
- verilog语言的计数器设计程序代码。-counter verilog language design code.
LL
- verilog语言描述的异步FIFO设计。-verilog language to describe the asynchronous FIFO design.
qpsk_mod
- QPSK modulation using vhdl programming ..i hope it ll be useful-QPSK modulation using vhdl programming ..i hope it ll be useful...
dd
- Digital Delay using Verilog (The program is wrrong I ll upload the right one soon)