搜索资源列表
Watchdog
- 看门狗,又叫 watchdog timer,是一个定时器电路, 一般有一个输入,叫喂狗,一个输出到MCU的RST端,MCU正常工作的时候,每隔一端时间输出一个信号到喂狗端,给 WDT 清零,如果超过规定的时间不喂狗,(一般在程序跑飞时),WDT 定时超过,就回给出一个复位信号到MCU,是MCU复位. 防止MCU死机. 看门狗的作用就是防止程序发生死循环,或者说程序跑飞-Watchdog, called watchdog timer, a timer circuit, generally have
xPCTargetManual
- xPC Target 工具箱使你可以在 Simulink 的框图中加入 I/O 方块图,并用 RTW 产生代码,最后下载到另一个运行 xPC Target 实时内核的 PC 机上。对于控制和 DSP 系统来说 xPC Target 是理想的快速原型和硬件在回路测试工具,它可以使你在一台标准的 PC 机上运行实时模型。如果附加 xPC Target 嵌入模块选项,你可以把你的实时嵌入式系统放入到一台微机上,应用于生产、数据采集、标定和测试应用程序等过程中。 -xPC Target toolb
GPSINSUAV
- Development of GPS INS Loop for UAV
frequency_estimation
- QPSK开环载波同步技术研究 频偏估计算法-Open-loop carrier synchronization QPSK Research Frequency Offset Estimation Algorithm
PLL
- Practical Phase-Locked Loop Design.rar
RFC3063-chinese
- RFC3063 MPLS(多协议标签交换)环路预防机制 本文讲述了一种基于“线程”的、用于防止多协议标签交换协议(MPLS)设置含有环路的标签交换路径(LSP)的简单机制。此机制与虚电路(VC)的合并相兼容,但此兼容u并不是必需的。该机制还可用于下游按需等级分配也可用于下游等级分配。在协议消息中对要传输的信息进行了紧密的捆绑(也就是,不需使用路径矢量)。当一个节点需要转换到它的下一跳时,分布式程序被执行。不过,这只针对那些下游变化的节点。-RFC3063 MPLS (Multi-protoc
A_Novel_Structure_of_Signal_Demodulation_in_High_
- In this paper, a novel demodulation structure in high-frequency (HF) channel is introduced and studied.Frequency-offset estimation, ractionally spaced adaptive equalization and carrier recovery techniques are involved.Frequency-offset correction is
Scalable
- This will give descr iption of loop filter in h.264
verilog_dpll_
- 该源代码是用FPGA实现数字锁相环的逻辑,有需要的可以借鉴参考一下。-The source code is to use FPGA implementation of digital phase-locked loop logic, those in need can draw reference.
NME
- phase locked loop,line codes,cdma transceiver,kalman filter,nme
Interpolation_in_digital_modems_II
- This paper shows the schemes for interpolation filters, loop filters in Gardner model for perform Timing Recovery in Digital Communications
Costas_chip
- 介绍了一种基于正交解调芯片COSTAS环的模拟电路设计方法.-This paper discussed the design of costas loop analogical circuit
bhc
- 给tgo进行三维分量统计,编程的朋友提供方便,实现以三维坐标分量方式统计环闭合差-Three-dimensional component to tgo statistics, programming friends to provide convenient ways to achieve a three-dimensional coordinate statistical weight Loop Closure
openloop_eightzone
- open loop controller
Study-on-the-Control-Scheme
- 恒频恒压(CVCF)逆变电源的输出电压波形质量是衡量其性能的重要指标之一。文章采用一种重复控制和双闭环控制相结合的电压波形控制策略,以重复控制器提高逆变电源输出电压的稳态精度,减小总谐波畸变率;以双闭环控制器达到较快的动态响应速度。该方案在一台采用TMS320F240 DSP控制芯片的50 Hz三相PWM逆变器上得到验证。-Constant voltage constant frequency (CVCF) Inverter output voltage waveform quality is
Response-of-a-First-Order-Phase-Locked-Loop-to-Tw
- Response of a First-Order Phase Locked Loop to Two Sinusoidal Inputs
LDPC-codes--short-loop-algorithm
- 一种LDPC码校验矩阵消短环算法,发表在计算机工程与科学上-One kind of check matrix of LDPC codes eliminate short-loop algorithm
Uniform-loop-based-on--LDPC
- 一种基于均匀环路的LDPC码校验矩阵的构造方法,发表在信号处理杂志上。-Uniform loop based on check matrix of LDPC code construction method
rectangular-loop
- Calculator for Rectangulat loop antennas
183179780-VoIP-through-OPNET-s-system-in-the-loop
- VoIP through OPNET s system in the loop (sitl). An extented guide for real time simulation of communication systems.