搜索资源列表
software_hardware_checksum_fpga
- nois中基于c的ddr等存储器的checksum的实现.
SEED-DaVinci_EVM_ddr
- SEED-DaVinci_EVM ddr 开发源代码
u-boot-1.2.0-MPC5200Bpro-20070422
- 移植好的支持MPC5200B处理器和DDR SDRAM以及PCF8563实时时钟和SM712显卡启动的u-boot源代码
simulator
- 开源的基于SystemC的模拟器，可以模拟ARM CPU, Cache, DDR，NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is
OXE800SE_OXE800DSE
- SATA NAS SOC，200MHz ARM926EJS核 SATA接口的NAS用处理器，集成USB2.0 HOST接口，Ethernet控制器，DDR SDRAM控制器，PCI HOST接口，可以扩展PCI外设。-SATA NAS SOC，NAS COntroller with 200MHz ARM926EJS core, intergated SATA controller，USB2.0 HOST controller，Ethernet MAC controller，DDR SDRAM c
bcm5354_wireless
- 这是我整理的老外在bbs中的一段讨论留言，其主要是关于BCM354 DDR的升级，这方面的资料非常的少，希望对给需要这方面资料的朋友有所帮助！-This is my finishing foreigners in the bbs in a discussion message, which is mainly on the BCM354 DDR upgrade information in this regard is very little hope to the needy this inf
HY5DU121622CFP
- 64MB 512Mb, 16bit, DDR SDRAM MEMORY
EVMOMAPL137_Layout_revg
- 包括DDR、Nand、SD、audio、LCD、Ethernet、USB、SATA等接口-Including DDR, Nand, SD, audio, LCD, Ethernet, USB, SATA interfaces etc.
DDR
- S3C6410 ARM11的DDR裸机驱动编程，使用RVDS2.2配置j-linkV8调试，启动方式是nandflash-S3C6410 ARM11 DDR bare-metal programming, using the RVDS2.2 configuration j-linkV8 commissioning, start-up mode is nandflash
405EX_405EXr_AN2131_DDR
- AMCC PPC405EX DDR RAM 配置计算表-AMCC PPC405EX DDR RAM configuration tool
460EX_460EXr_460GT_AN2132_DDR
- AMCC PPC460EX DDR RAM 配置计算表-AMCC PPC460EX DDR RAM configuration tool
led
- OK6410的led裸机程序 注：烧写bootloader 的目的是让开发板上电时对PLL,DDR RAM 进行初始化。以便把程序加 载到内存中进行调-Note: The purpose is to allow programming the bootloader development board is powered on PLL, DDR RAM is initialized. So that the program is loaded into memory for tone
arm_boot
- 某培训机构，基于s3c6410的裸机代码：包括最初的函数(汇编编写)和Makefile 以及时钟、串口、DDR、nand flash、LCD、链接脚本的裸机代码。-A training organization, based s3c6410 bare metal code: including the initial function (compilation prepared) and Makefile and the clock, serial, DDR, nand flash, LCD b
14th_ddr
- 6410开发板对应的ddr驱动源码，基于裸板开发，对于学习驱动开发是很好的参考示例-6410 development board corresponding to the ddr-driven source, based on the bare board development, learning-driven development is a good reference example
Allwinner_V3s_Datasheet_V1.0.pdf
- 全志v3s的datasheet。详细的寄存器说明。 全志v3s介绍：内置64M ddr内存，qfp封装(V3s of datasheet. Detailed register instructions. Whole chronicles v3s introduction: built in 64M DDR memory, QFP package)