搜索资源列表
verilog
- 8bit alu use verilog hdl
Verilog
- EPP和51的接口逻辑Verilog源代码.rar
Digital-Design-and-Computer-Architecture-verilog.r
- 《数字设计和计算机体系结构》一书MIPS verilog源码。
64位乘法器verilog
- 64位乘法器的源码，测试代码以及详细的报告
ssp_arm.rar
- arm 的ssp—spi verilog源代码,arm of the ssp-spi verilog source code
OV7620
- 这是我自己编写的FX2控制ov7620的VERILOG程序，网上很难找的-This is my own written FX2 control ov7620 the VERILOG program, very difficult to find online
risc8
- PIC单片机的verilog实现，不记得在哪里下载的。源文件中应该有的。-PIC MCU Verilog realized, can not remember where to download. Source file should have.
usb11.tar
- USB1.1 SOURCE CODE verilog
risc
- 嵌入式risc处理器源码，包含设计文档，原理图，testbench，及外围接口，使用verilog实现。-Source embedded RISC processors, including design documents, schematics, testbench, and peripheral interfaces, the use of Verilog to achieve.
Mips_Top
- 是verilog做的简化mips32指令系统。 有些小问题，用就能发现，是学习的好资料。 如果有必要，可以和我联系。-Verilog do is simplify the MIPS32 instruction set. Some small problems, and use can be found, is to learn from good information. If necessary, can contact me.
sdram
- artera 的一个SDRAM 模型（verilog）-artera an SDRAM model [verilog]
sdram_samsung
- 三星SDRAM的verilog模型的完整源码-Verilog model of Samsung SDRAM complete source
arm7-verilog
- 用verilog写的仿ARM7的代码，在opencore上，现在被撤掉了-Written by verilog code like ARM7
MIPS
- 带分支预测的MIPS流水线的verilog原代码。 详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
mips_multi
- mips processor multicycle non-pipelined microprocessor by verilog
clock
- simple clock over verilog
iic_top27
- iic总线的硬件描述，verilog语言编写，希望有意者下载-iic bus hardware descr iption, verilog language, I hope those who are interested to download
arm_moni
- verilog 程序，用于通讯系统测试，输入40MHz时钟，40倍分频之后，输出1Mhz时钟-verilog procedures for communication system testing, 40MHz input clock frequency to 40 times, the output clock 1Mhz
NIOS_I2C_test
- nios 中I2C总线的使用，卡拉OK的完整实例。其实不是用VHDL编写的，而是用Verilog编写的。我的工程和代码绝对完整！-nios in the use of I2C bus, karaoke OK example. Is not prepared to use VHDL, but prepared using Verilog.
vgactl9
- EPM240+IS61LV1024+VERILOG实现简单的VGA控制器,RGB各1bit,与AT91SAM7S64接口.-EPM240+ IS61LV1024+ VERILOG to achieve a simple VGA controller, RGB each 1bit, and AT91SAM7S64 interface.